february 2002 ? 2002 fairchild semiconductor corporation fdc5614p rev c1 (w) fdc5614p 60v p-channel logic level powertrench ? ? ? ? mosfet general description this 60v p-channel mosfet uses fairchild?s high voltage powertrench process. it has been optimized for power management applications. applications ? dc-dc converters ? load switch ? power management features ? ?3 a, ?60 v. r ds(on) = 0.105 ? @ v gs = ?10 v r ds(on) = 0.135 ? @ v gs = ?4.5 v ? fast switching speed ? high performance trench technology for extremely low r ds(on) d d d s d g supersot -6 tm 6 5 4 1 2 3 absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage ?60 v v gss gate-source voltage 20 v i d drain current ? continuous (note 1a) ?3 a ? pulsed ?20 maximum power dissipation (note 1a) 1.6 w p d (note 1b) 0.8 t j , t stg operating and storage junction temperature range ?55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 78 c/w r jc thermal resistance, junction-to-case (note 1) 30 c/w package marking and ordering information device marking device reel size tape width quantity .564 fdc5614p 7?? 8mm 3000 units fdc5614p
fdc5614p rev c1 (w) electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = ?250 a ?60 v ? bv dss ? t j breakdown voltage temperature coefficient i d = ?250 a, referenced to 25 c ?49 mv/ c i dss zero gate voltage drain current v ds = ?48 v, v gs = 0 v ?1 a i gssf gate?body leakage, forward v gs = 20v, v ds = 0 v 100 na i gssr gate?body leakage, reverse v gs = ?20 v v ds = 0 v ?100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = ?250 a ?1 ?1.6 ?3 v ? v gs(th) ? t j gate threshold voltage temperature coefficient i d = ?250 a,referenced to 25 c 4 mv/ c r ds(on) static drain?source on?resistance v gs = ?10 v, i d = ?3 a v gs = ?4.5 v, i d = ?2.7 a v gs = ?10 v, i d = ?3 a t j =125 c 82 105 130 105 135 190 m ? i d(on) on?state drain current v gs = ?10 v, v ds = ?5 v ?20 a g fs forward transconductance v ds = ?5 v, i d = ?3 a 8 s dynamic characteristics c iss input capacitance 759 pf c oss output capacitance 90 pf c rss reverse transfer capacitance v ds = ?30 v, v gs = 0 v, f = 1.0 mhz 39 pf switching characteristics (note 2) t d(on) turn?on delay time 7 14 ns t r turn?on rise time 10 20 ns t d(off) turn?off delay time 19 34 ns t f turn?off fall time v dd = ?30 v, i d = ?1 a, v gs = ?10 v, r gen = 6 ? 12 22 ns q g total gate charge 15 24 nc q gs gate?source charge 2.5 nc q gd gate?drain charge v ds = ?30v, i d = ?3.0 a, v gs = ?10 v 3.0 nc drain?source diode characteristics and maximum ratings i s maximum continuous drain?source diode forward current ?1.3 a v sd drain?source diode forward voltage v gs = 0 v, i s = ?1.3 a (note 2) ?0.8 ?1.2 v notes: 1. r ja is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mou nting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design. a. 78c/w when mounted on a 1in 2 pad of 2oz copper on fr-4 board. b. 156c/w when mounted on a minimum pad. 2. pulse test: pulse width 300 s, duty cycle 2.0% fdc5614p
fdc5614p rev c1 (w) typical characteristics 0 3 6 9 12 15 012345 -v ds , drain-source voltage (v) -6.0v -5.0v -4.5v -3.5v v gs = -10v -4.0v -2.5v -3.0v 0.8 1 1.2 1.4 1.6 1.8 0246810 -i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs = -3.5v -5.0v -6.0v -7.0v -8.0v -10v -4.5v -4.0v figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) i d = -3.0a v gs = -10v 0 0.1 0.2 0.3 0.4 246810 -v gs , gate to source voltage (v) i d = -1.5a t a = 125 o c t a = 25 o c figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. 0 3 6 9 12 15 12345 -v gs , gate to source voltage (v) t a = -55 o c 25 o c 125 o c v ds = -5v 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -v sd , body diode forward voltage (v) v gs = 0v t a = 125 o c 25 o c -55 o c figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. fdc5614p
fdc5614p rev c1 (w) typical characteristics 0 2 4 6 8 10 0 4 8 12 16 q g , gate charge (nc) -v gs , gate-source voltage (v) i d = -3.0a v ds = -10v -20v -30v 0 200 400 600 800 1000 1200 0 102030405060 -v ds , drain to source voltage (v) c iss c oss c rss f = 1 mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitance characteristics. 0.01 0.1 1 10 100 0.1 1 10 100 -v ds , drain-source voltage (v) -i d , drain current (a) dc 10s 1s 100ms 100 s r ds(on) limit v gs = -10v single pulse r ja = 156 o c/w t a = 25 o c 10ms 0 10 20 30 40 0.1 1 10 100 1000 t 1 , time (sec) single pulse r ja = 156c/w t a = 25c figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r ja (t) = r(t) + r ja r ja = 156c/w t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 p(pk) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1b. transient themal response will change depending on the circuit board design. fdc5614p
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careers | sitema go datasheets, samples, buy technical information applications design center support company investors my f a home >> find products >> product status/pricing/packaging fdc5614p 60v p-channel logic level powertrench mosfet general description back to top features back to top applications back to top contents ? general description ? features ? applications ? product status/pricing/packaging ? order samples ? models ? qualification support this 60v p-channel mosfet uses fairchild?s high voltage powertrench process. it has been optimized for power management applications. z -3 a, -60 v. r ds(on) = 0.105 ? @ v gs = -10 v, r ds(on) = 0.135 ? @ v gs = -4.5 v z fast switch ing speed z high performance trench technology for extremely low r ds(on) . z dc-dc converters z load switch z power management datasheet download this datasheet e - mail this datasheet this page print version this product use in fetbench a nalysis related links request samples how to order products product change notices (pcns) support sales support quality and reliability design cente r pa g e 1 of 3 product folder - fairchild p/ n fdc5614p - 60v p-channel lo g ic level powertrench mosfet 16-au g -2007 mhtml:file://c:\temp\fdc5614p _ nf073.mht
back to top models back to top qualification support click on a product for detailed qualification data back to top product product status pb-free status pricing* package type leads packing method package marking convention** fdc5614p full production $0.402 ssot - 6 6 tape reel line 1: &e& y (binary calendar year coding) line 2: .564 fdc5614p_nf073 full production n/a ssot - 6 6 tape reel line 1: &e& y (binary calendar year coding) line 2: .564 * fairchild 1,000 piece budgetary pricing ** a sample button will appear if the part is available through fa irchild's on-line samples program. if there is no sample butt on, please contact a fairchild distributor to obtain samples indicates product with pb -free second-level interconne ct. for more information click here. package marking information for product fdc5614p is available. click here for more information . package & leads condition temperature range software version revision date pspice ssot-6-6 electrical 25c to 125c orcad 9.1 jan 30, 2000 product fdc5614p fdc5614p_nf073 ? 2007 fairchild semiconductor pa g e 2 of 3 product folder - fairchild p/ n fdc5614p - 60v p-channel lo g ic level powertrench mosfet 16-au g -2007 mhtml:file://c:\temp\fdc5614p _ nf073.mht
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